TRON06024 2013 Circuit Layout Design 2

General Details

Full Title
Circuit Layout Design 2
Transcript Title
Cct layout
N/A %
Subject Area
TRON - Electronics
MENG - Mech. and Electronic Eng.
06 - NFQ Level 6
05 - 05 Credits
Start Term
2013 - Full Academic Year 2013-14
End Term
9999 - The End of Time
Liam Winters
Programme Membership
SG_EELEC_C06 201500 Higher Certificate in Engineering in Engineering in Electronics SG_ETRON_B07 201600 Bachelor of Engineering in Electronic Engineering SG_EELCO_B07 201700 Bachelor of Engineering in Electronic and Computer Engineering SG_EELCO_C06 201700 Higher Certificate in Engineering in Engineering in Electronic and Computer Engineering SG_EELCO_C06 201800 Higher Certificate in Engineering in Electronic and Computer Engineering SG_EELCO_B07 201800 Bachelor of Engineering in Electronic and Computer Engineering

Using Multisim and Ultiboard to layout circuits

Learning Outcomes

On completion of this module the learner will/should be able to;


Transfer and design a circuit from schematic design software to PCB CAD  software


Create new pad shapes, components board sizes and shapes in CAD PCB software


 Design PCB for through hole mounting and surface mounting components


Design PCB assemble station for ESD


 Create testing Plan from pcb netlist


Create details required for third party PCB manufacture

Indicative Syllabus

Measurements in PCB manufacture. thous for tracks, pads, spacings and grids, Mm’s for special layouts, Working to Grids, Working from the top tracks and layers and pads and via’s. Clearances  Allowing for currents and voltages. Use of auto-touter and follow-me routing, earth lines and power lines, power planes, single sides versus double sided. Component handling for ESD. Through hole versus surface mounting. Other layers, solder mask, keep out, silkscreen, multilayer design, design rule checking backward and forward annotation.

Coursework & Assessment Breakdown

Coursework & Continuous Assessment
100 %

Coursework Assessment

Title Type Form Percent Week Learning Outcomes Assessed
1 Continuous Assessment Cont Assesment Continuous Assessment UNKNOWN 100 % OnGoing 1,2,3,4,5,6

Full Time Mode Workload

Type Location Description Hours Frequency Avg Workload
Lecture Lecture Theatre cct layout 2 Weekly 2.00
Laboratory Practical Engineering Laboratory cct layout lab 2 Weekly 2.00
Total Full Time Average Weekly Learner Contact Time 4.00 Hours

Module Resources

Non ISBN Literary Resources

Electromagnetic Compatibility Engineering [Hardcover] Henry W Ott Wiley 2009

EMC for Product Designers, Fourth Edition Tim Francis Newnes 2007

The Circuit Designer’s Companion Second edition Tim Williams Newnes 2005

Other Resources


Additional Information